Viewing file: mlalb_lane_u32.c (1.83 KB) -rw-r--r-- Select action/file-type: (+) | (+) | (+) | Code (+) | Session (+) | (+) | SDB (+) | (+) | (+) | (+) | (+) | (+) |
/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
#include "test_sve_acle.h"
/* ** mlalb_lane_0_u32_tied1: ** umlalb z0\.s, z4\.h, z5\.h\[0\] ** ret */ TEST_DUAL_Z (mlalb_lane_0_u32_tied1, svuint32_t, svuint16_t, z0 = svmlalb_lane_u32 (z0, z4, z5, 0), z0 = svmlalb_lane (z0, z4, z5, 0))
/* ** mlalb_lane_0_u32_tied2: ** mov (z[0-9]+)\.d, z0\.d ** movprfx z0, z4 ** umlalb z0\.s, \1\.h, z1\.h\[0\] ** ret */ TEST_DUAL_Z_REV (mlalb_lane_0_u32_tied2, svuint32_t, svuint16_t, z0_res = svmlalb_lane_u32 (z4, z0, z1, 0), z0_res = svmlalb_lane (z4, z0, z1, 0))
/* ** mlalb_lane_0_u32_tied3: ** mov (z[0-9]+)\.d, z0\.d ** movprfx z0, z4 ** umlalb z0\.s, z1\.h, \1\.h\[0\] ** ret */ TEST_DUAL_Z_REV (mlalb_lane_0_u32_tied3, svuint32_t, svuint16_t, z0_res = svmlalb_lane_u32 (z4, z1, z0, 0), z0_res = svmlalb_lane (z4, z1, z0, 0))
/* ** mlalb_lane_0_u32_untied: ** movprfx z0, z1 ** umlalb z0\.s, z4\.h, z5\.h\[0\] ** ret */ TEST_DUAL_Z (mlalb_lane_0_u32_untied, svuint32_t, svuint16_t, z0 = svmlalb_lane_u32 (z1, z4, z5, 0), z0 = svmlalb_lane (z1, z4, z5, 0))
/* ** mlalb_lane_1_u32: ** umlalb z0\.s, z4\.h, z5\.h\[1\] ** ret */ TEST_DUAL_Z (mlalb_lane_1_u32, svuint32_t, svuint16_t, z0 = svmlalb_lane_u32 (z0, z4, z5, 1), z0 = svmlalb_lane (z0, z4, z5, 1))
/* ** mlalb_lane_z8_u32: ** str d8, \[sp, -16\]! ** mov (z[0-7])\.d, z8\.d ** umlalb z0\.s, z1\.h, \1\.h\[1\] ** ldr d8, \[sp\], 16 ** ret */ TEST_DUAL_LANE_REG (mlalb_lane_z8_u32, svuint32_t, svuint16_t, z8, z0 = svmlalb_lane_u32 (z0, z1, z8, 1), z0 = svmlalb_lane (z0, z1, z8, 1))
/* ** mlalb_lane_z16_u32: ** mov (z[0-7])\.d, z16\.d ** umlalb z0\.s, z1\.h, \1\.h\[1\] ** ret */ TEST_DUAL_LANE_REG (mlalb_lane_z16_u32, svuint32_t, svuint16_t, z16, z0 = svmlalb_lane_u32 (z0, z1, z16, 1), z0 = svmlalb_lane (z0, z1, z16, 1))
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