Viewing file:  cond_convert_3.c (1.49 KB) -rw-r--r--
Select action/file-type:
 (+) |  (+) |  (+) | Code (+) | Session (+) |  (+) | SDB (+) |  (+) |  (+) |  (+) |  (+) |  (+) |
/* { dg-do compile } */
/* { dg-options "-O2 -ftree-vectorize -fno-trapping-math" } */
#include <stdint.h>
#define DEF_LOOP(FLOAT_TYPE, INT_TYPE) \
void __attribute__ ((noipa)) \
test_##INT_TYPE (FLOAT_TYPE *__restrict r, \
INT_TYPE *__restrict a, \
INT_TYPE *__restrict pred, int n) \
{ \
for (int i = 0; i < n; ++i) \
r[i] = pred[i] ? (FLOAT_TYPE) a[i] : 0.0; \
}
#define TEST_ALL(T) \
T (_Float16, int16_t) \
T (_Float16, uint16_t) \
T (float, int32_t) \
T (float, uint32_t) \
T (double, int64_t) \
T (double, uint64_t)
TEST_ALL (DEF_LOOP)
/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.h, p[0-7]/m,} 1 } } */
/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.h, p[0-7]/m,} 1 } } */
/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.s, p[0-7]/m,} 1 } } */
/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.s, p[0-7]/m,} 1 } } */
/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.d, p[0-7]/m,} 1 } } */
/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.d, p[0-7]/m,} 1 } } */
/* Really we should be able to use MOVPRFX /z here, but at the moment
we're relying on combine to merge a SEL and an arithmetic operation,
and the SEL doesn't allow the "false" value to be zero when the "true"
value is a register. */
/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+, z[0-9]+\n} 6 } } */
/* { dg-final { scan-assembler-not {\tmov\tz[^\n]*z} } } */
/* { dg-final { scan-assembler-not {\tsel\t} } } */
|
