Viewing file:  args_5_le_s32.c (1.89 KB) -rw-r--r--
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/* { dg-do compile { target lp64 } } */
/* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
/* { dg-final { check-function-bodies "**" "" } } */
#pragma GCC aarch64 "arm_sve.h"
/*
** callee:
** (
** ldr (z[0-9]+), \[x1, #1, mul vl\]
** ldr (z[0-9]+), \[x1\]
** st2w {\2\.s - \1\.s}, p0, \[x0\]
** |
** ldr (z[0-9]+), \[x1\]
** ldr (z[0-9]+), \[x1, #1, mul vl\]
** st2w {\3\.s - \4\.s}, p0, \[x0\]
** )
** st4w {z0\.s - z3\.s}, p1, \[x0\]
** st3w {z4\.s - z6\.s}, p2, \[x0\]
** st1w z7\.s, p3, \[x0\]
** ret
*/
void __attribute__((noipa))
callee (void *x0, svint32x4_t z0, svint32x3_t z4, svint32x2_t stack,
svint32_t z7, svbool_t p0, svbool_t p1, svbool_t p2, svbool_t p3)
{
svst2 (p0, x0, stack);
svst4 (p1, x0, z0);
svst3 (p2, x0, z4);
svst1_s32 (p3, x0, z7);
}
void __attribute__((noipa))
caller (void *x0)
{
svbool_t pg;
pg = svptrue_b8 ();
callee (x0,
svld4_vnum_s32 (pg, x0, -8),
svld3_vnum_s32 (pg, x0, -3),
svld2_vnum_s32 (pg, x0, 0),
svld1_vnum_s32 (pg, x0, 2),
svptrue_pat_b8 (SV_VL1),
svptrue_pat_b16 (SV_VL2),
svptrue_pat_b32 (SV_VL3),
svptrue_pat_b64 (SV_VL4));
}
/* { dg-final { scan-assembler {\tld4w\t{z0\.s - z3\.s}, p[0-7]/z, \[x0, #-8, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld3w\t{z4\.s - z6\.s}, p[0-7]/z, \[x0, #-3, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tld1w\tz7\.s, p[0-7]/z, \[x0, #2, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tmov\tx1, sp\n} } } */
/* { dg-final { scan-assembler {\tld2w\t{(z[0-9]+)\.s - z[0-9]+\.s}.*\tstr\t\1, \[x1\]\n} } } */
/* { dg-final { scan-assembler {\tld2w\t{z[0-9]+\.s - (z[0-9]+)\.s}.*\tstr\t\1, \[x1, #1, mul vl\]\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
/* { dg-final { scan-assembler {\tptrue\tp3\.d, vl4\n} } } */
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